As microelectronic packaging technology advances for higher processor performance, establishing good mechanical contact between a microelectronic package and pins used in fine pitch packages becomes an important consideration. Such fine pitch packages may exhibit poor tolerances, and reliance on purely mechanical alignment techniques may be insufficient, and may result in unacceptably high retest rates for fine-pitch products, for example. Additionally, co-planarity problems which may occur when a package is mis-seated into a test socket, for example, may damage both the package and the socket.